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TC7710AWBG 2014- 04- 11 1 cd mos integrated circuit silicon monolithic TC7710AWBG ic for battery charger 1. outline the TC7710AWBG is a programmable battery charger for lithium - ion and lithium - polymer battery pack . the TC7710AWBG support s charge current up to 2.0a. for handheld devices with high capacity battery pack, this ic can charge the battery more quickly compared to the conventional device s. 2. application s mobile phones devices with a single cell lithium - ion battery 3. features ? input voltage : 4.35v to 6.5v ? battery charging specification 1.2 detection ? battery shutdown current : 3 8 a( t yp.) ? maximum charge current : 2.0 a ? protections and detections ? input over voltage protection (iovp) ? under voltage lock out (uvlo) ? input current control ? battery voltage monitor ? battery temperature monitor ? switching frequency : 3.0mhz ? package : wcsp25 pin s - w fbga25 - 0303 - 0.40 - 00 1 s - wfbga25 - 0303 - 0.40 - 00 2
TC7710AWBG 2014- 04- 11 2 4. block diagram figure 4 - 1 block diagram pin 1 : dcin pin: a1 and a2. pin 2 : sw pin: c1 and c2. pin 3 : sgnd pin: c3 and d3. pin 4 : pgnd pin: d1 and d2. note. : please refer to application circuit about parts and pin connection. sw pgnd csin csout ovp uvlo vbatt therm regulator control logic sda ilim_otg scl stat en dm dp dcin ovp uvlo pwm control sw vmoni mid a4 a3 a5 b1 b2 b5 pin 2 e2 c5 d5 e5 e4 e3 e1 sgnd pin 3 pin 4 pin 1
TC7710AWBG 2014- 04- 11 3 5. pin assignment figure 5 - 1 pin assignment not e. : pl ease pay attention that corner pin which is next to the mark of no.1 is a1. 1 2 3 4 5 a b c d e top view 1 2 3 4 5 a b c d e bottom view mark of pin no.1 mark of pin no.1
TC7710AWBG 2014- 04- 11 4 6. pin functions table 6 - 1 pin functions (1) pin no. pin name i/o pin description a1, a2 dcin i/o i/o pin for usb vbus / input pin for ac ada pter charge dc voltage input mode (+4.35v to +6.5v) otg voltage 5v output mode the capacitor of 1.0 f or more must be connected between dcin pin and gnd to stabilize the voltage. a3 dp i/o i/o pin (+) for power source detection it is connected to d+ pin of the usb connector. a4 dm i/o i/o pin ( - ) for power source detection it is connected to d - pin of the usb connector. a5 scl i signal input pin for i 2 c bus clock input pin of clock signal for serial communication. pull - up resistance should be connected to scl pin because it is an open - drain pin. b1 mid i fet midpoint input pin. middle - point voltage pin of high side mosfet. the capacitor of 2.2 f or more should be connected between mid pin and gnd to stabilize the voltage. b2 vmoni o input monitor for dc voltage the voltage corresponding to dcin is outputted and monitored in the range of uvlo to ovlo. b5 sda i/o i/o pin for i 2 c bus data signal. pull - up resistance should be connected to sda pin because it is an open- drain pin. c1, c2 sw o pwm signal output pin pwm signal output pin for dcdc convertor. one - side of the inductor is connected to this pin. c3, d3 sgnd - power supply pin for small signal (gnd). c5 en i input pin for enable signal. this is a charge control pin for enable and resume . as for setting logic, polarity can be converted by register data. enpinpol (11 h ,bit0) en signal low high 0 charge stop charge 1 stop charge charge pay attention that validity of en pin changes depending on ensel (11 h, bit2). d1, d2 pgnd - power supply pin (gnd) for large signal. d5 stat o status signal output pin error and operation state set by register are outputted from stat pin. when error is generated, the TC7710AWBG outputs logic low . pull - up resistance should be connected to stat pin because it is an open - drain pin.
TC7710AWBG 2014- 04- 11 5 table 6 - 2 pin functions (2) pin no. pin name i/o pin description e1 csin i current sense input pin connect high side of the current sense resistance. e2 vbatt i sub power supply / kelvin sense input pin connect + pin of battery directly. e3 therm i battery thermistor sense input pin temperature can be detected by connecting this pin to t pin of ordinary battery pack. connect this pin to one - side of the thermistor (10 / 25 / 50 / 100k ? ntc thermistor ) which is inside of the battery pack or on the pcb. e4 csout i/o current sense i/o pin connect low side of the current sense resistance. e5 ilim_otg i input pin for control input current or input pin for switching otg operation this pin sets input current and switches otg operation. current level of charging mode is controlled (usb mode / ac mode) or valid of invalid or otg mode is switched. b3, b4, c4, d4 test - ic test pin. toshiba test pin. it must be open.
TC7710AWBG 2014- 04- 11 6 7. functions 7.1 input current limit input current from dcin pin can be limited to the value set by ilim_otg pin or i 2 c (refer to the table below.) . when input current exceeds the preset value , th e TC7710AWBG limits current to below the preset value automatically. when dcin voltage turns into below the threshold voltage set by i 2 c, the TC7710AWBG limits current to the usb100 level (max 100ma) and ind icates an interrupt signal . to resume the current limit to the former level, the interrupt signal must be cleared (refer to the command: intclr5 (15h, bit5).) . after clearing the interrupt signal, input current limit is set to the former level quickly. for safe use, input current limit is set to lower value and the interrupt signal can be cleared. table 7 - 1 command (1) (1) forced setting ( 13h,bit4= 1 ) (2) usb automatic detection setting (13h,bit4= 0 ) caution s : u sb automatic detection setting - in case input current limit setting is ac, source detection result is ignored. - in case input current limit setting is usb500 and source detection is sdp or cdp, input current is limited 100ma. - in case input current limit setting is usb100 and source detection is dcp, input current is limited 100ma. dc p: dedicated charging port sdp : standard downstream port cdp : c harging downstream port command register no./ b it no. contents acilmt 4- 0 03h, bit7- 3 ac input current limit usb51 13h,bit6 usb mode setting when ilim_otg is valid atpsdet 13h, bit4 automatic power source detection lmt_otg1 - 0 13h, bit3- 2 input current limit setting ilimlvl1 - 0 13h,bit1 - 0 input current limit setting when i 2 c is valid. atilmt 13h, bit5 current limit function by dcin voltage intatil 20h,bit5 generated the interrupt factor of input current limit input current limit input current limit set ting ilim_otg pin / i 2 c s ource detection dp / dm detection usb500 usb500 * usb100 usb100 * ac ac * input current limit input current limit set ting ilim_otg pin / i 2 c s ource detection dp / dm detection usb500 usb500 unconnected usb500 dcp usb100 usb100 unconnected * sdp * cdp ac ac *
TC7710AWBG 2014- 04- 11 7 7.2 dcin input voltage protection when input voltage from dcin pin exceeds specified voltage (typ . 6.5v), input is shutdown. charge is valid when input voltage is higher than the uvlo and lower than the ovlo . as soon as dcin input supply is removed, char ge is invalid automatically. under the condition that charge is invalid, uvlo / ovlo detection for dcin pin and ovlo detection for battery voltage are invalid. 7.3 preliminary charge state when dcin input supply is connected, the TC7710AWBG check the following items for charge start - up. after starting charge, charge is suspended when one of the following items is outside the limits (1) dcin input volta ge uvlo voltage, dcin input voltage ovlo voltage (2) dcin voltage > battery voltage + 100mv (3) ch arge is enable d. (set by i 2 c or en pin. re fer to the command : ensel(11h,bit2), encmd(11h,bit1), enpinpol(11h,bit0). ) (4) b attery temperature is between high limit and low limit (refer to the command : tempdet(12h,bit7), biascrt1 - 0(1eh,bit7 - 6), coldvth1 - 0(1eh,bit3 - 2), hotvth1 - 0(1eh,bit1- 0).). table 7 - 2 command (2) 7.4 trickle charge p reliminary charge state is ok, the TC7710AWBG starts trickle charge with 50ma (typ.) if battery voltage is lower than 2.1v. 7.5 pre - charge when battery voltage exceeds 2.1v, the TC7710AWBG starts pre - charge with the charge current set by the register. pre -c harge continues until the battery voltage reaches the fast charge threshold voltage set by the register (refer to the comm and : ccvth2 - 0(01h,bit2- 0).) . if the battery voltage is not exceed the fast charge threshold voltage before the pre - charge timer expires , charge is suspended and an interrupt signal is indicated (refer to the command : intchger(20h,bit1), st_tmer1 - 0(23h,bit1 - 0).) . if battery voltage is lower to the trickle charg e level during pre - charge, the TC7710AWBG becomes trickle charge mode and indicates an interrupt signal (refer to the command : intvbat(20h,bit6).).in this case, if trickle charge is invalid (12h,bit0= 1 ), the TC7710AWBG doesn t beco me trickle charge and doesn t indicate an interrupt signal. table 7 - 3 command (3) command register no./ b it no. contents ensel 11h,bit2 en control encmd 11h,bit1 en control by i 2 c enpinpol 11h,bit0 polarity of en pin tempdet 12h,bit7 battery temperature detection command register no./ b it no. contents pci 1- 0 00h, bit1- 0 pre - charge current ccvth2 - 0 01h, bit2- 0 threshold voltage for fast charge
TC7710AWBG 2014- 04- 11 8 7.6 fast charge (constant current charge mode) when fast charge mode is valid , the TC7710AWBG starts constant current charge mode if battery voltage exceeds the fast charge thres hold voltage set by the register. the TC7710AWBG limits charge current to below input c urrent limit value (refer to the command : cciset(12h,bit2), prccth(12h,bit1), ccvth2 -0 (01h,bit2 - 0).). if battery voltage is lower to the pre charge level during fast charge, the TC7710AWBG becomes pre - charge mode and indicates an interrupt signal (refer to the command : intvbat( 20h,bit6).). table 7 - 4 command (4) 7.7 fast charge (constant voltage charge mode) the TC7710AWBG starts constant voltage charge mode if battery voltage becomes the float voltage set by the register during constant current charge mode (refer t o the command : fltv6 - 0(02h,bit6- 0).) . table 7 - 5 command (5) 7.8 charge completion when charge completion is valid (refer to the command : ct(12h,bit3).) , charging is completed if charge current is lower than the charge termination current set by the register (refer to the command : cei1 - 0(00h,bit5 - 4).). if charge timer has expired until charge is completed , the TC7710AWBG terminates the charge and indicates an interrupt signal (refer to the command : intchger(20h,bit1), st_tmer1 - 0(23h,bit1 - 0).). if charge completion is invalid (ct(12h,bit3)=1) , the TC7710AWBG continues cv charge and doesn t indicate an interrupt signal. in this case, the TC7710AWBG is controlled by i 2 c to terminate the cha rge. the status st_cged0 (24h,bit4) can be checked if charge current is lower than the current set by the register during cv charge mode. table 7 - 6 command (6) 7.9 re - charge the TC7710AWBG recharge s the battery when the battery voltage falls by a value set by the register below the float voltage (refer to the command : fltv6 - 0(02h,bit6- 0), atrchgth(00h,bit6) is fixed to 140mv. ). the TC7710AWBG can recharge only when dcin input supply is connected , charge is enabled and the charge start - up condition is satisfied before charge. in this case, the TC7710AWBG is controlled by command to recharge the battery automatically (refer to the command : atrchg(12 h,bit4).) . table 7 - 7 command ( 7 ) command register no./ b it no. contents cci4- 0 01h, bit7- 3 fast charge current cciset 12h,bit2 fast charge mode setting command register no./ b it no. contents fltv6 - 0 02h,bit6 - 0 float voltage command register no./ b it no. contents ct 12h, bit3 charge completion cei 1- 0 00h, bit5- 4 charge termination current st_cged0 24h, bit4 charge current is lower than the charge termination current ( only cv mode) . command register no./ b it no. contents atrchgth 00h,bit6 threshold voltage for automatic recharge. * 140mv only. atrchg 12h, bit4 automatic recharge
TC7710AWBG 2014- 04- 11 9 7.10 automatic charge the TC7710AWBG can start c harge automatically regardless of enable control (refer to the command : dbatvdet(00h,bit7), atchg(11h,bit3).) when battery voltage is lower than dead battery threshold . in case the battery voltage is higher than dead battery threshold, charge is controlled by en pin / i 2 c, an d in case the battery voltage is lower than dead battery threshold , the TC7710AWBG starts charge when dcin input supply is connected , charge is enabled and the charge start - up condition is satisfied before charge. a charge enable shall be set after 3 ms since the float voltage is set. the TC7710AWBG continues charge until charge is completed or pre - charge safety timer of 36minutes is expired. table 7 - 8 command (8) 7.11 usb otg t he TC7710AWBG can supply a regulated 5v output at the dcin pin for powering peripherals compliant with the usb otg specification (refer to the command : otgvctl1 - 0(04h,bit5- 4).) . when only a battery is connected (ac adaptor or usb isn t connected) and battery voltage is higher than battery uvlo voltage, otg control can be enabled by ilim_otg pin or i 2 c (refer to the command : otguvth1 - 0(04h,bit1- 0), otgmd( 13h,bit7), lmt_otg1 - 0(13h,bit3- 2).) . if battery uvlo, battery current limit and dcin uvlo are occurred during otg mode , otg operation is suspended . otg operation resumes by ilim_otg pin or i 2 c . during otg operation, output current is controlled by a value set by the register (refer to the command : cci 4 - 0(01h,bit7- 3 ).).when output current exceeds the preset value, the TC7710AWBG shuts off the otg voltage and indicates an interrupt signal (refer to the command : intotger(20h,bit3), st _otglm(22h,bit1).). when the chip temperature exceeds 135 c during otg operation, the TC7710AWBG shuts off the otg voltage and indicates an interrupt signal (refer to the command : intotger(20h,bit3), st_otgjct(22h,bit3).) . during otg operation, a watchdog timer should be valid for system safety. w hen a watchdog timer is expired, the TC7710AWBG shuts off the otg voltage and indicates an interrupt signal (refer to the command : otgwdtm(10h,bit4), intotger(20h,bit3), st_otwdt(22h,bit2).). table 7 - 9 command (9) command register no./ b it no. contents dbatvdet 00h,bit7 threshold for dead battery atchg 11h,bit3 automatic charge command register no./ b it no. contents cci4- 0 01h,bit7 - 3 otg battery current limit otgvctl1 - 0 04h,bit5 - 4 otg output voltage otguvth1 - 0 04h,bit1 - 0 battery uvlo setting in otg otgwdtm 10h,bit4 otg watchdog timer otgmd 13h,bit7 otg control by i 2 c lmt_otg1 - 0 13h,bit3 - 2 otg control setting
TC7710AWBG 2014- 04- 11 10 7.12 watchdog timer a watchdog timer is reset with e very i 2 c ack signal transmitted from a system. if watchdog timer is expired during the charging / otg operation, the TC7710AWBG suspends the charging / otg operation, indicates an interrupt signal and reset the following registers : 00h - 13h, 1eh, and 1fh (e- fuse data is reloaded.). during otg operation, a watchdog timer should be valid for sy stem safety. and standby watchdog timer should be valid when the TC7710AWBG doesn t charge or supply otg power (refer to the command : stbwdtm(10h,bit5), otgwdtm(10h,bit4), chgwdtm(10h,bit3).). however both watchdog timers are not valid from a fully charged state to an automatic recharge starts, since the TC7710AWBG isn t in a charge mode or a standby mode. to set a charge disable, standby watchdog timer is valid for this time. table 7 - 10 command (10) 7.13 safety timer the TC7710AWBG has a pre - charge timer of 36 minutes and a charge timer of 240 minutes (refer to the command : prchgtm(10h,bit2), chgstm(10h,bit1).). a pre - charge timer of 36 minutes is start ed after preliminary charge state is ok, the TC7710AWBG starts trickle charge. an d this timer is reset when the mode is changed from pre - charge to fast charge. a charge timer of 240 minutes is also started after preliminary charge state is ok, the TC7710AWBG suspends the charging if charge current isn t lower than the charge terminatio n current within a timer. it is possible not to include trickle charge time in the charge timers (refer to the command : tcston(10h,bit0).) . b oth timers can be cleared by i 2 c in case charge timers are monitored by system (refer to the command : chgtmclr(10h , bit6).) . when the TC7710AWBG starts recharge in case an auto recharge is valid, these safety timers aren t valid. therefore it is recommended that an external timer is applied by system for charge protection. table 7 - 11 command (11) 7.14 operating state stat pin is output that indicates operating state . when battery is charging or dcin voltage is lower than uvlo / higher than ovlo, thi s pin is asserted low level. a type of state from stat pin is controlled by command , and the output is inv alided controlled by command (refer to the command : statmd(14h,bit2), statout(14h,bit1).). stat pin is open - drain output, a pull - up resistor should be connected to this pin . table 7 - 12 command (12) command register no./ b it no. contents otgwdtm 10h, bit4 otg watchdog timer chgwdtm 10h,bit3 charge watchdog timer stbwdtm 10h,bit5 standby watchdog timer command register no./ b it no. contents prchgtm 10h, bit2 pre - charge timer chgstm 10h, bit1 charge timer tcston 10h,bit0 i nclude or not include trickle charge time in the timers chgtmclr 10h,bit6 timer clear command re gister no./ b it no. contents statmd 14h, bit2 select a type of state from stat pin statout 14h,bit1 stat output on/off
TC7710AWBG 2014- 04- 11 11 7.15 interrupt / abnormal detection stat pin is output that indicates s even interrupt signals. interrupt signal and interrupt mask are set by i 2 c. the TC7710AWBG outputs a pulse signal from stat pin for 0.8ms every 350m s and indicates an interrupt signal to system. the system checks an interrupt factor , clears the factor and executes the interrupt process a ccording to the factor. standby wdt error otg error re - charge charge error charge completion occurrence of automatic input current limit occurrence of charge state back to previous mode the following tables describe the error recovery. table 7 - 13 interrupt process standby wdt error otg error re - charge interrupt factor TC7710AWBG process recovery process timer expired registers of 00h - 13h, 1e h, and 1f h are initialized. s tandby mode transition set r egisters of 00h - 13h, 1e h , and 1f h. interrupt factor TC7710AWBG process recovery process wd timer expired shut off otg supply. registers of 00h - 13h, 1e h, and 1f h are initialized. standby mode transition set r egisters of 00h - 13h, 1e h , and 1f h. exceed current limit shut off otg supply. control otg function disable to enable manually. battery uvlo occur shut off otg supply. control otg function disable to enable manually. exceed chip temp erature shut off otg supply. control otg function disable to enable manually. output (dcin) voltage drop under uvlo shut off otg supply. control otg function disable to enable manually. interrupt factor TC7710AWBG process recovery process vbat < vfloat \ 140mv restart charging (atrchg=0) -
TC7710AWBG 2014- 04- 11 12 charge error charge completion occurrence of automatic input current limit occurrence of charge state back to previous mode interrupt factor TC7710AWBG process recovery process input o vlo occur stop c harg ing. after charge start - up condition is satisfied, the TC7710AWBG restarts charging from standby mode. input u vlo occur stop charging. after charge start - up condition is satisfied, the TC7710AWBG restarts charging from standby mode. * the TC7710AWBG doesn t output an interrupt signal since all registers are initialized for por. dcin < vbat + 105mv stop charging. after charge start - up condition is satisfied, the TC7710AWBG restarts charging from standby mode. out of battery temperature limit continue charging. (tempdet= 0 ) en should be turned off manually. suspend charging. (tempdet= 1 ) after charge start - up condition is satisfied, the TC7710AWBG resumes charging automatically. exceed chip temperature continue charging. (ovtlmt= 0 ) en should be turned off manually. * it is recommended charging is suspended in this case (ovtlmt(12h,bit6)=1). suspend charging. (ovtlmt= 1 ) after charge start - up condition is satisfied, the TC7710AWBG resumes charging automatically. battery ovlo occur stop charging. (batov= 1 ) after charge start - up condition is satisfied, en should be turned on manually. unconnected battery stop charging. after charge start - up condition is satisfied, en should be turned on manually. charge wdt expired continue charging. registers of 00h - 13h, 1e h, and 1f h are initialized. set r egisters of 00h - 13h, 1e h , and 1f h. * charge timers are run ning on. charge timer expired stop charging. en should be turned on manually. input voltage drop continue charging. the TC7710AWBG limits current to the 100ma. (atilmt= 0 ) to resume the current limit to the former level, the interrupt signal must be cleared. interrupt factor TC7710AWBG process recovery process ichg < iterm charge completion (ct= 0 ) - interrupt factor TC7710AWBG process recovery process exceed input current continue charging. the TC7710AWBG limits current to the 100ma. to resume the current limit to the former level, the interrupt signal must be cleared. interrupt factor TC7710AWBG process recovery process charge state is back to previous mode by battery voltage drop . - -
TC7710AWBG 2014- 04- 11 13 table 7 - 14 command (13) 7.16 chip temperature monitoring chip temperature is monitored during charge/otg. when chip temperature exceeds 1 35 c , chip te mperature monitoring bit is set high. and w hen chip temperature falls 115 c , it is set low (refer to the command : st_jcton(21h,bit2).) . charge stops when chip temperature monitoring bit is set high. and charge re - starts automatically when it i s set low. (it depends on the set conditions. refer to the command : ovtlmt(1 2h,b it6).) ) otg stops when chip temperature monitoring bit is set high (refer to the command : st_otgjct(22h,bit3).) . table 7 - 15 command (14) command register no./ b it no. contents intout 14h, bit3 select an info r mation from stat pin. statout 14h,bit1 control an output from stat pin. int*** 20h,bit6 - 0 interrupt factor st_*** 21h, 22h, 23h status information command register no./ b it no. contents st_jcton 21h,bit2 chip temperature state (charging mode) st_otgjct 22h,bit3 chip temperature state (otg mode) ovtlmt 12h,bit6 charge stop in high temperature
TC7710AWBG 2014- 04- 11 14 7.17 battery temperature monitoring battery temperature is monitored before charging and in charging through therm pin. when battery temperature exceeds the programmed temperature limit , charg e can be suspended (refer to the command : tempdet(12h,bit7).) . while battery temperature is out of t he limit range, the TC7710AWBG stops charge timer indicates charge error interrupt signal (refer to the command : intchger(20h,bit1), st_batht(21h,bit1), st_batcl(21h,bit0).) . and w hen the temperature becomes within the limit range, the TC7710AWBG resumes c harge and charge timer . as detection range is different depending on a characteristic of ntc thermistor, external resistance which is the same value of r25 is connected in parallel typically . and the intended range of temperature is set (refer to the command : coldvth1 - 0(1eh,bit3- 2), hotvth1 - 0(1eh,bit1- 0).) . the TC7710AWBG supports thermistors which value of r25 is 1 0k ? , 25k ? , 50k ? , and 100k ? . a current source of 200 a, 80 a, 40 a, and 20 a is selected depending on the resister (refer to the command : biascrt1 - 0(1eh,bit7 - 6).) . table 7 - 1 6 temperature limit table 7 - 17 command (15) vtherm [v] 3000 3250 3500 3750 4000 4250 4500 4750 5000 0.509 61 58 55 53 51 50 48 47 46 0.574 55 53 50 49 47 46 45 44 43 0.647 49 47 45 44 43 42 41 40 39 0.726 43 42 40 39 39 38 37 36 36 1.000 25 25 25 25 25 25 25 25 25 1.399 1 3 5 6 7 8 9 9 10 1.491 - 4 - 2 0 1 2 4 5 6 7 1.577 - 10 - 8 - 5 - 4 - 2 - 1 1 2 3 1.654 - 16 - 13 - 10 - 8 - 7 - 5 - 3 - 2 - 1 command register no./ b it no. contents tempdet 12h,bit7 charge control with battery temperature monitoring biascrt1 - 0 1eh,bit7 - 6 current source value for temperature monitoring coldvth1 - 0 1eh,bit3 - 2 threshold voltage for low temperature detection hotvth1 - 0 1eh,bit1 - 0 threshold voltage for high temperature detection intchger 20h, bit1 charge error interrupt st_batht 21h,bit1 battery high temperature detection status st_batcl 21h,bit0 battery low temperature detection status
TC7710AWBG 2014- 04- 11 15 7.18 power source detection the TC7710AWBG corresponds t o battery charging specification rev1.2 . automatic power source detection can be set by the register (refer to the command : atpsdet(13h,bit4).) . source detection starts as soon as dcin is connected. there are four kinds of detection results as follows; non - connection, sdp (standard downstream port), cdp (charging downstream port), and d cp (dedicated charging port) (refer to the command : st_styp1 -0 (25h,bit1 - 0).) . i nput current limit can be set depending on the detection state (refer to 7. 1 input current limit . ). table 7 - 18 command (16) 7.19 unconnected battery detection the TC7710AWBG executes battery detection through v batt pin (refer to the command : batmsdet(11h,bit4).). when battery voltage is lower than 2.1v, the TC7710AWBG starts trickle charge. and when battery voltage exceeds 2.1v, the TC7710AWBG starts pre - charge. if battery voltage exceeds 3.3v within 85ms after starting pre - charge, the TC7710AWBG detects as unconnected battery (refer to the command : intchger(20h,bit1), st_batms(21h,bit7).). table 7 - 19 command (17) 7.20 vmoni output the TC7710AWBG outputs the signal which monitored dcin input voltage. table 7 - 20 command (18) command register no./ b it no. contents atpsdet 13h,bit4 automatic power source detection st_styp 1- 0 25h,bit1 - 0 source detection result command register no./ b it no. contents batmsdet 11h,bit4 execute battery detection intchger 20h,bit1 charge error interrupt st_batms 21h,bit7 unconnected battery detection command register no./ b it no. contents vmonicnt 14h,bit4 output vmon i signal
TC7710AWBG 2014- 04- 11 16 7.21 battery save mode the TC7710AWBG becomes battery save mode when dcin is in uvlo and standby wdt is invalid, or when otg is disable. if there are i 2 c signals among the battery save mode, the TC7710AWBG changes the mode to the standby mode. wait time 1ms is necessary to write next i 2 c signal successively. if there is a dcin input among the battery save mode, the TC7710AWBG enables por and becomes standby mode. 7.22 i 2 c bus a communication between the tc7710a wbg and the host is operated using i 2 c format. b oth the clock line ( scl ) and the data line ( sda ) provide a communication between the TC7710AWBG and the host. t here are start condit i on and stop condition , when they send and receive the data. t he commands are sent between start condition and stop condition . r efer to the following figure . figure 7 - 1 relation between start condition and s top condition table 7 - 21 list of the protocol symbols symbols descriptions start condition repeat start condition stop condition slave address(high 7 bits) read mode( TC7710AWBG - > host) write mode(host - > TC7710AWBG ) u ndefined (1 or 0) / ack (host - > TC7710AWBG ). t his symbol in gray shows that the TC7710AWBG output low level when it receives ack ( TC7710AWBG - > host) / nack (host - > TC7710AWBG ). t his symbol in gray shows that the TC7710AWBG output hi - z when it receives nack( TC7710AWBG - > host) command register for the TC7710AWBG this symbol shows 1 byte. this symbol in gray shows data flow from the TC7710AWBG to host in read. ??? this symbol shows that the block (bit or byte, packet) is continued. scl sda start condition stop condition s p h h s sr p slave address r w x a a na command code na data byte data byte
TC7710AWBG 2014- 04- 11 17 7.22.1 detailed bits the TC7710AWBG supports the following i 2 c bus bit sequence. figure 7 - 2 bit sequence 7.22.2 start condition / stop condition the TC7710AWBG is communicated on i 2 c format. s o, the packets divided by start condition / stop condition are transmitted and received. the communication consists of scl (clock line) and sda (data line). i f they don t communicate, both clock line and data line are fixed to high level. i t goes through s tart condition that data line goes down earlier than clock line. a nd it goes through stop condition that clock line goes down earlier than data line. it is prohibited changing condition of the data line, while the clock line is high level in normal communication. it regar d s as the end of the communication, if the receiver doesn t operate that data line with low level in the timing which it receives ack bit. a nd, after the end of the communication, it is possible to restart from start condit i on withou t stop condition . 7.22.3 ack data t he receiver notifies the transceiver of ack data by receiving 1 byte (8 bits) to indicate its condition. i f it is no problems, it operates data line with low level after the clock of byte 8 (lsb) goes down. i f the data communic ation error has occurred by any problems, the TC7710AWBG reports nack. 7.22.4 slave address the TC7710AWBG can choose the slave address that has 8 types by the fixed e - fuse data. table 7 - 22 slave address 7.22.5 write bytes it transmits in order of an slave a ddress , command code and data byte . figure 7 - 3 write bytes msb lsb a ddress 0 0 0 1 0 0 1 w / r 0 0 0 1 0 0 0 w / r 0 0 0 1 0 1 1 w / r 0 0 0 1 1 0 1 w / r 0 0 1 1 0 0 1 w / r 0 1 0 1 0 0 1 w / r 1 0 0 1 0 0 1 w / r 7 6 5 4 3 2 1 0 msb lsb byte slave address s w a a p data byte command code a
TC7710AWBG 2014- 04- 11 18 7.22.6 read bytes if the following bit of slave address is set to 1 , the TC7710AWBG is selected in read mode. the TC7710AWBG sends the data that is issued by command code to the host, just before selected in read mode. figure 7 - 4 read bytes 7.23 cautions in writing i 2 c register to avoid a transitional response of operating parameter by i 2 c register rewriting, the TC7710AWBG stops an internal operation change for about 250 s after i 2 c register writing. so i f i 2 c register is written successively in 250 s, internal operation remains stopping in the meantime. and r egister is written normally. if programmed parameters are rewritten continuously after writing the charge en control register and the otg control register , charge and otg operation do not start while i 2 c register is under writ ing . so r ewrite parameter first, then rewrite of the en control register and the otg control register. as for reading of i 2 c register, internal operation does not stop. slave address s w a a p command code sr slave address r a data byte na
TC7710AWBG 2014- 04- 11 19 8. register map address=00h bit command r/w initial value contents 7 dbatvdet r/w 1 dead battery voltage threshold 0 vbatt < 3.47v 1 vbatt < 3.54v 6 atrchgth r/w 0 automatic re - charge voltage threshold 0 140mv 1 140mv 5 cei1 r/w 0 charge completion current 00 50m a *unavailable 01 100m a 10 150m a 11 200ma initial state : 01 =100m a 4 cei0 r/w 1 3 - r 0 - 2 - r 0 - 1 pci1 r/w 1 pre - charge current 00 50m a 01 100m a 10 150m a 11 200m a 0 pci0 r/w 1
TC7710AWBG 2014- 04- 11 20 address=0 1 h address=0 2 h bit command r/w initial value contents 7 cci4 r/w 0 fast charge current 00000 300ma 01001 1,200ma 00001 400ma 01010 1,300ma 00010 500ma 01011 1,400ma 00011 600ma 01100 1,500ma 00100 700ma 01101 1,600ma 00101 800ma 01110 1,700ma 00110 900ma 01111 1,800ma 00111 1,000ma 10000 1,900ma 01000 1,100ma 10001 2,000ma initial value : 00010 =500ma otg current limit *only otg is enabled 00010 500ma 01100 1,500ma 00111 1000ma 01111 1,800ma initial value : 00010 =5 00ma 6 cci3 r/w 0 5 cci2 r/w 0 4 cci1 r/w 1 3 cci0 r/w 0 2 ccvth2 r/w 1 threshold voltage from pre - charge to fast charge 000 2.6v 100 3.0v 001 2.7v 101 3.1v 010 2.8v 110 3.2v 011 2.9v 111 3.3v initial value is 3.0v. 1 ccvth1 r/w 0 0 ccvth0 r/w 0 bit command r/w initial value contents 7 - r 0 - 6 fltv6 r/w 0 float voltage 0000000 3.46v 0000001 3.47v 0000010 3.48v : : 1111101 4.71v 1111110 4.72v 1111111 4.73v initial va lue : 0000100 =3.50v 5 fltv5 r/w 0 4 fltv4 r/w 0 3 fltv3 r/w 0 2 fltv2 r/w 1 1 fltv1 r/w 0 0 fltv0 r/w 0
TC7710AWBG 2014- 04- 11 21 address=0 3 h address=0 4 h bit command r/w initial value contents 7 acilmt 4 r/w 0 ac input current limit 00000 300ma 01001 1,200ma 00001 400ma 01010 1,300ma 00010 500ma 01011 1,400ma 00011 600ma 01100 1,500ma 00100 700ma 01101 1,600ma 00101 800ma 01110 1,700ma 00110 900ma 01111 1,800ma 00111 1,000ma 10000 1,900ma 01000 1,100ma 10001 2,000ma current values in above table are maximum limit current. initial value is 500ma. 6 acilmt 3 r/w 0 5 acilmt 2 r/w 0 4 acilmt 1 r/w 1 3 acilmt0 r/w 0 2 - r 0 - 1 atlmtth1 r/w 0 automatic input current limit threshold 00 4.25v 01 4.50v 10 4.75v 11 5.00v initial va lue : 01 =4.5v 0 atlmtth0 r/w 1 bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 otg vctl 1 r/w 0 otg output voltage 00 5.0v 01 5.1v 10 5.2v 11 5.3v initial value : 00 =5.0v 4 otg vctl 0 r/w 0 3 - r 0 - 2 - r 0 - 1 otguvth1 r/w 0 uvlo threshold in otg mode 00 2.75v 01 3.00v 10 3.25v 11 3.50v initial value : 00 =2.75v 0 otguvth0 r/w 0
TC7710AWBG 2014- 04- 11 22 address=0 5 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 - r 0 - 3 - r 0 - 2 - r 0 - 1 ovthl1 r/w 1 over charge threshold voltage 00 2 00mv 01 1 50mv 10 10 0mv * not recommended 11 50mv * not recommended init ial value : 1 0=100mv notice : please use 150mv or 200mv setting instead of initial value. over charge threshold voltage : float vo ltage + (setting voltage of this register) corresponds to over - charge voltage threshold. 0 ovthl0 r/w 0
TC7710AWBG 2014- 04- 11 23 address= 10 h bit command r/w initial value contents 7 - r 0 - 6 chgtmclr r/w 0 pre - charge safety timer / charge safety timer clear 0 timer operation 1 both of charge timers are cleared. (pulse command) in this time, status information of pre - charge and charge timer is cleared. 5 stbwdtm r/w 0 standby wd timer 0 42sec wdt : invalid 1 42sec wdt : valid if the TC7710AWBG is controlled by i 2 c before dcin is inputted, standby wd timer should be valid. 4 otgwdtm r/w 0 otg wd timer 0 42sec wdt : invalid 1 42sec wdt : valid otg wd timer should be valid in otg mode. 3 chgwdtm r/w 0 charge wd timer 0 42sec wdt : invalid 1 42sec wdt : valid 2 prchgtm r/w 0 pre - charge safety timer 0 36min timer : valid 1 36min timer : invalid 1 chgstm r/w 0 charge safety timer 0 240min timer : valid 1 240min timer : invalid 0 tcston r/w 1 trickle charge safety timer 0 pre - charge timer and charge timer do not operate in trickle charging. 1 pre - charge timer and charge timer operate in trickle charging.
TC7710AWBG 2014- 04- 11 24 address= 11 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 batmsdet r/w 1 unconnected battery detection 0 invalid 1 valid 3 atchg r/w 1 automatic charge control 0 invalid ( off in charge d isable) 1 valid ( in charge d isable , it is charged only when the battery voltage is lower than threshold. ) (in charge enable, it is charged regardless of the battery voltage.) it is charged automatically when the battery voltage is lower than dead battery threshold. 2 ensel r/w 0 en is controlled by i 2 c or en pin . 0 controlled by en pin . (polarity is selected by enpinpol) 1 controlled by i 2 c. (selected by encmd.) 1 encmd r/w 1 en is controlled by i 2 c. 0 enable (charger is tuned on.) 1 disable (charger is turned off.) 0 enpinpol r/w 1 polarity of en control is selected by en pin . 0 "l" is active. ("l"=enable, "h"=disable) 1 "h" is active. ("l"=disable, "h"=enable)
TC7710AWBG 2014- 04- 11 25 address= 12 h bit command r/w initial value contents 7 tempdet r/w 0 battery thermal detection 0 valid (charging stops when the temperature exceeds the limit value. and charging re - starts automatically when the temperature falls within the range.) 1 invalid (charging does not stop though the temperature exceeds limit value.) 6 ovtlmt r/w 1 ic temperature limit 0 only status bit: valid 1 status bit: valid. permission of suspending charge. 5 batov r/w 1 battery ov 0 charging cycle does not terminate when battery voltage is ov. 1 charging cycle terminates when battery voltage is o v . 4 atrchg r/w 0 auto re - charge 0 valid 1 invalid 3 ct r/w 0 terminating 0 permitting termination of charging cycle. 1 not permitting termination of charging cycle. charging is completed when charg e current is lower than the value set by cei1 - 0. 2 cciset r/w 1 fast charge setting ( prcc th = "1 : valid) 0 setting forced pre - charge current 1 permission of setting fast charge current 1 prccth r/w 0 threshold voltage from pre - charge to fast charge 0 valid 1 invalid 0 trchg r/w 0 trickle charge 0 valid 1 invalid
TC7710AWBG 2014- 04- 11 26 address= 13 h bit command r/w initial value contents 7 otgmd r/w 0 otg mode 0 invalid 1 valid 6 usb51 r/w 0 i nput current limit level set by ili m_otg pin in usb ("l" level) . 0 usb500 mode 1 usb100 mode this setting is valid under the following condition. l mt_otg1 - 0 = "01", ilim_otg pin="l" . 5 atilmt r/w 0 automatic input current limit 0 valid 1 invalid i nput current limit is set usb100 when dcin falls to the level set by atlmtth1 - 0. when an interrupt is cleared, it is set to previous limit level. 4 atpsdet r/w 0 automatic power source detection 0 valid 1 invalid (set level = limit level) 3 lmt_otg1 r/w 0 i nput current limit and otg control are set by pin or i 2 c. 00 i nput current limit is set by i 2 c (ilimlvl1 - 0) . otg mode is set by i 2 c (otgmd) . 01 i nput current limit is set by ilim_otg pin. "l"= usb mode, usb51="l" - > usb500 mode "l"= usb mode, usb51="h" - > usb100 mode "h"=ac mode (set by acilmt 4 - 0) otg mode is set by i 2 c (otgmd) . 10 i nput current limit is set by i 2 c (ilimlvl1 - 0). otg mode is set by ilim otg pin ("h" active) . "l" : invalid, "h" : valid 11 i nput current limit is set by i 2 c (ilimlvl1 - 0) . otg mode is set by ilim _ otg pin ("l" active) . "l" : valid, "h" : invalid 2 lmt_otg0 r/w 1 1 ilimlvl1 r/w 1 input current limit level in i 2 c control. 00 usb500 mode (typ . = 475ma, max = 500ma) 01 usb100 mode (typ . = 90ma, max = 100ma) 10 ac mode ( set by acilmt 4 - 0.) 11 ac mode ( set by acilmt 4 - 0.) initial value: 10 = ac mode. 0 ilimlvl0 r/w 0
TC7710AWBG 2014- 04- 11 27 address= 14 h address= 15 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 vmonicnt r/w 0 vmoni control 0 valid 1 invalid 3 intout r/w 0 information from stat pin is selected . 0 status information is outputted. (information is set by statmd. statout = "0" : output is valid.) 1 interrupt output (statout = "1" : interrupt information is valid.) 2 statmd r/w 0 information from stat pin is selected . 0 charging state is indicated. 1 state of input uv/ov is indicated. 1 statout r/w 0 output of stat pin : on/off 0 on 1 off 0 sftrst r/w 0 soft reset command 0 off 1 internal reset (pulse command) register is cleared and default value is reloaded . bit command r/w initial value contents 7 intclr7 r 0 i nterrupt factor is cleared. i nterrupt factor for each bit of 20h is cleared. (pulse command) 6 intclr6 r/w 0 5 intclr5 r/w 0 4 intclr4 r/w 0 3 intclr3 r/w 0 2 intclr2 r/w 0 1 intclr1 r/w 0 0 intclr0 r/w 0
TC7710AWBG 2014- 04- 11 28 address= 16 h address= 1e h bit command r/w initial value contents 7 intmsk7 r 0 interrupt output from stat pin is masked. (interrupt information is active regardless of state of this bit.) 0 interrupt factor is not masked . 1 interrupt factor is masked . 6 intmsk6 r/w 1 5 intmsk5 r/w 1 4 intmsk4 r/w 1 3 intmsk3 r/w 1 2 intmsk2 r/w 1 1 intmsk1 r/w 1 0 intmsk0 r/w 1 bit command r/w initial value contents 7 biascrt1 r/w 0 current source for temperature monitoring 00 200 a 01 80 a 10 40 a 11 20 a 6 biascrt0 r/w 0 5 - r 0 - 4 - r 0 - 3 coldvth1 r/w 0 threshold level f or low temperature judge 00 1.399 v 01 1.491 v 10 1.577 v 1 1 1.654 v 2 coldvth0 r/w 0 1 hotvth1 r/w 0 threshold level f or high temperature judge 00 0.509 v 01 0.574 v 10 0.647 v 1 1 0.726 v 0 hotvth0 r/w 1
TC7710AWBG 2014- 04- 11 29 address= 1f h address= 20 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 - r 0 - 3 - r 0 - 2 i2csvad2 r/w 0 i 2 c slave address 000 no conversion - > 0001001 001 convert bit0 - > 0001000 010 convert bit 1 - > 0001011 011 convert bit 2 - > 0001101 100 conver t bit3 - > 0000001 * reserved : cbus address 101 convert bit 4 - > 0011001 110 convert bit 5 - > 0101001 111 convert bit 6 - > 1001001 1 i2csvad1 r/w 0 0 i2csvad0 r/w 0 bit command r/w initial value contents 7 - r 0 - 6 intvbat r 0 1: charge state is back to previous mode by battery voltage drop. 5 intatil r 0 1: a uto matic input current limit is occurred. 4 intstber r 0 interrupt of standby wdt error 1: wdt error is occurred. register of 00h - 13h , 1eh and 1fh are initialized. 3 intotger r 0 interrupt of otg error ( i nterrupt factor should be confirmed 22h) 1: otg error is occurred. 2 intrchg r 0 interrupt of re - charge 1: re- charge 1 intchger r 0 interrupt of charge error ( i nterrupt factor should be confirmed 21h and 23h.) 1: charge error is occurred. 0 inttermn r 0 interrupt of charge complete. however, it is valid only when ct (12h, bit 3) is "0" . 1: charge completion
TC7710AWBG 2014- 04- 11 30 address= 21 h address= 22 h bit command r/w initial value contents 7 st_batms r 0 status 1: u nconnected battery detected. 6 st_vbatn r - status : initial value depends on dcin voltage and battery voltage. 1: dcin < vbatt 5 st_batov r - status : initial value depends on battery voltage. 1: battery ovlo 4 st_dcovl r - status : initial value depends on dcin input voltage. 1: input ovlo 3 st_dcuvl r - status : initial value depends on dcin input voltage. 1: input uvlo 2 st_jcton r - status : initial value depends on chip temperature. it operates though in charging or otg mode. chip temperat ur e 135 c : 1, chip temperature 115 c : 0 1: internal temper ature is limited. 1 st_batht r - status : initial value depends on battery temperature. 1: high temperature detected 0 st_batcl r - status : initial value depends on battery temperature. 1: low temperature detected bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 st_otgvol r 0 status : it shows 0 f or 250 ms after starting otg . 1: output voltage drops under dcin uvlo. 3 st_otgjct r - status : initial value depends on chip temperature. it operates though in charging or otg mode. chip temper atu re 135c : 1, chip temperature 115 c: 0. 1: internal temperature limited. 2 st_otwdt r 0 status 1: wdt error occurred . otg supply is shut off . registers of 00h- 13h, 1e h and 1f h are initialized. 1 st_otglm r - status : initial value depends on otg current. 1: otg current limit reached 0 st_ otuvl r - status : initial value depends on battery voltage. 1: otg battery uvlo
TC7710AWBG 2014- 04- 11 31 address= 23 h address= 24 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 - r 0 - 4 - r 0 - 3 - r 0 - 2 st_chwdt r 0 status 1: wdt error occurred . charging stops. register of 00h - 13h, 1e h and 1f h are initialized. however, only charging timer operates continuously. 1 st_tmer1 r 1 status : safety timer 00 no timeout occurred. 01 pre - charge timer expired. 10 charge timer expired. 11 waiting to start charge 0 st_tmer0 r 1 bit command r/w initial value contents 7 st_otgmd r 0 status 1: otg in progress 6 - r 0 - 5 st_cged1 r 0 status : charge completion 1: at least, one charge cycle starts and completes. 4 st_cged0 r - status : charge completion initial value depends on charge current. 1: charge current is lower than charge completion current (valid only in cv charge mode.) . 3 st_trchg r 0 status 1: trickle charge mode (vbatt < 2.1v) 2 st_cgmd1 r 0 status : charging 00 no charge 01 pre - charge 10 constant current charge (cc mode) 11 constant voltage charge (cv mode) 1 st_cgmd0 r 0 0 st_chgen r 0 status : charge valid / invalid 0 charge invalid 1 charge valid
TC7710AWBG 2014- 04- 11 32 address= 25 h address= 26 h bit command r/w initial value contents 7 - r 0 - 6 - r 0 - 5 st_usb51 r * status : usb5/1 mode initial value is determined by 13h, 6. 0 usb 100ma mode 1 usb 500ma mode 4 st_usbac r 0 status : usb / ac mode 0 usb mode 1 ac mode 3 st_dtbsy r 0 status : power source detection function 0 not busy 1 busy 2 st_psdst r 1 status : power source detection 0 detecting 1 finished (after source detected ) 1 st_styp1 r 0 status : power source type 00 non connection 01 sdp (standard downstream port) 10 c dp (charging downstream port) 11 dcp (dedicated charging port) 0 st_styp0 r 0 bit command r/w initial value contents 7 - r 0 - 6 revcode2 r 0 device revision code 000 #1.0 5 revcode1 r 0 4 revcode0 r 0 3 - r 0 - 2 - r 0 - 1 - r 0 - 0 - r 0 -
TC7710AWBG 2014- 04- 11 33 9. mode transition diagram figure 9 - 1 mode transition diagram
TC7710AWBG 2014- 04- 11 34 10. flow chart of function < before charge > figure 10 - 1 flow cha rt : before charge
TC7710AWBG 2014- 04- 11 35 < after start charging > figure 10 - 2 flow chart : afte r start charging
TC7710AWBG 2014- 04- 11 36 < trickle charge > figure 10 - 3 flow cha rt : t rickle charge
TC7710AWBG 2014- 04- 11 37 < pre charge > figure 10 - 4 fl ow cha rt : pr e - charge
TC7710AWBG 2014- 04- 11 38 < cc charge > figure 10 - 5 flow cha rt : cc charge
TC7710AWBG 2014- 04- 11 39 < cv charge > figure 10 - 6 flow c hart : cv charge
TC7710AWBG 2014- 04- 11 40 < full charge > figure 10 - 7 flow ch art : fu ll charge
TC7710AWBG 2014- 04- 11 41 < unconnected battery detection > figure 10 - 8 flow cha rt : u nconnected battery detection
TC7710AWBG 2014- 04- 11 42 < otg > figure 10 - 9 flow ch art : otg
TC7710AWBG 2014- 04- 11 43 11. timing chart < dcin on / off > figure 11 - 1 timing cha rt : dc in on / off
TC7710AWBG 2014- 04- 11 44 < forced charge termination > figure 11 - 2 timing c hart : forced charge termination auto charge control 11h,bit3= 0 set charge disable, forced charge termination. 11h,bit3= 1 set charge disable, charge operates if vbat < v dbatdet (00h,bit7) . [initial value] en control polarity 11h,bit2= 0 controlled by en pin. [initial value] 11h,bit2= 1 controlled by i 2 c command. en controlled by i 2 c 11h,bit1= 0 charge e nable 11h,bit1= 1 charge d isable en pin polarity select 11h,bit0= 0 l active (en=l : enable , h : disable) 11h,bit0= 1 h active (en=h : enable , l : disa ble)
TC7710AWBG 2014- 04- 11 45 < i 2 c > figure 11 - 3 timing ch art : i 2 c - when dcin = uvlo and standby wdt is invalid, or otg = disable, the TC7710AWBG becomes the battery save mode. - if there is an i 2 c signal among the battery save mode, the TC7710AWBG changes the mode to the standby mode. wait time 1ms is necessary to write next i 2 c signal successively. - if standby wdt is valid by command in the battery save mode, the TC7710AWBG cannot resume the battery save mode. - when the TC7710AWBG is communicated by i 2 c in standby mode or charge mode, register setting is reflect soon, but state transition is occurred 250 s after that. if i 2 c command is set successively in 250 s, state transition is occurred 250 s after last communication.
TC7710AWBG 2014- 04- 11 46 12. absolute maximum ratings table 12 - 1 absolute maximum ratings ( unless otherwise specified, ta = 25c ) characteristics symbol rating unit remarks applied voltage of sw pin vin1 - 0.3 to 6.5 v applied voltage of dcin pin, mid pin vin2 - 1.5 to 10.0 v applied voltage of stat pin vin3 - 0.3 to 6.5 v applied voltage of other pins vin4 - 0.3 to 6.5 v power dissipation 1 (*note1) pdmax 1080 mw operating temperature (*note2) topr - 40 to 85 c junction temperature tj 150 c storage temperature tstg - 55 to 150 c n ote1 : when ta is 25 c or more, 16.67 mw decreases per 1 c rise. note2 : the operation range of actual use without any problems. note3 : the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a m oment. do not exceed any of these ratings. exceeding the rating (s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. please use the ic within the specified operating ranges.
TC7710AWBG 2014- 04- 11 47 13. electrical charact eristics dc characteristics (1) table 13 - 1 dc characteristics (unless otherwise specified, v dc in = 5.0v , v flt = 4.2v , v batt = 3.7v , ta = -30 to 85 c , all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit input voltage v dcin +4.35 +6.5 v input uvlo voltage v uvlodcin v dcin risin g 3.40 3.60 3.80 v v dcin falling 3.20 3.50 3.70 v input ovlo voltage v ovlodcin v dcin rising (no glitch filter) 6.20 6.50 6.90 v v dcin falling 6.10 6.30 6.60 v vmoni output voltage v vmonirng v uvlodcin < v dcin < v ovlodcin , v dcin - 1.0 v vmoni output on - resistance r vmoni 1.7 k ? current limit threshold accuracy v clacc ac mode, v cl = 4.5v - 4 + 4 % battery ovlo voltage v bov =150mv or 200mv v flt + v automatic shutdown threshold v ashdn v dcin - v batt , v dcin rising 60 130 200 mv v dcin - v batt , v dcin falling 0 60 130 mv dcin current (active) i dcin - active charging, not including ichg, linear 1.6 ma charging, not including ichg, pwm 14 ma shutdown current i shdn charge invalid, v dcin = 5v, v batt = 3.7v, no load, dcin uvl o , standby mode 1.3 2.5 ma battery shutdown current i auxshdn current from battery dcin = open, vbatt = 3.7v 38 67 a leakage current i dcinlk dcin current when charge is invalid, v dcin = 1v, v batt = 4.2v 2 a otg current i ddmotg otg valid, v batt = 3.7v, no load 4 ma over temperature threshold, charge mode t limitchg 135 c over temperature threshold hysteresis, charge mode t hystchg 20 c over temperature threshold, otg mode t limitotg 135 c over temperature threshold hysteresis, otg mode t hystotg 20 c
TC7710AWBG 2014- 04- 11 48 dc characteristics (2) sw mode controller table 13 - 2 dc characteristic (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit fet on - resistance r rdson high - side (dcin to sw), note 3 233 367 m ? low - side (sw to gnd), note 3 125 200 m ? current limit i limit v batt = 3.0v 3 a duty cycle d.c. maximum 100 % minimum 0 % dc characteristics (3) battery charger table 13 - 3 dc characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit trickle charge to pre - charge voltage threshold v tricklechg 1.9 2.05 2.2 v unconnected battery voltage threshold v batmis 3.15 3.3 3.45 v trickle charge current i tricklechg v batt = 1.7v 30 50 80 ma dead battery voltage threshold v batdead programmable (2 settings) : 3.47v, 3.54v - 4 4 % pre - charge to fast charge voltage threshold v prechg programmable v prechg = 2.6 to 3.3 v ( 8 steps) - 3.5 3.5 % usb1 input current limit i usb1lmt t a = 0 to 70 c , i usb1lmt = 90ma, note 2, vmoni off 60 80 100 ma usb5 input current limit i usb5lmt t a = 0 to 70 c , i usb5lmt = 475ma, 400 460 500 ma ac input current limit (programmable 300ma to 20 00ma, 18 steps) i aclmt t a = 0 to 70 c , i aclmt = 500ma - 100 55 ma constant current sense voltage v sense i fchg = 1000ma 68 mv pre - charge current (programmable 50ma to 200ma, 50ma/step) i prechg t a = 0 to 70 c , i prechg = 100ma, note 1 - 30 30 ma fast charge current (programmable 300ma to 20 00ma, 18 steps) i fchg ta = 0 to 70 c , r sense = 68m ? , i fchg = 500ma, note 1 - 50 50 ma charge termination current (programmable 100ma to 200ma, 50ma/step) i term ta = 0 to 70 c , r sense = 68m ? , i term = 100ma - 30 30 ma charge termination current (programmable 100ma to 200ma, 50ma/step) i term ta = 0 to 70 c , r sense = 68m ? , i term = 150ma, 200ma - 30 30 % float voltage (programmable 3.46v to 4.72v, 10mv/step) v flt t a = 0 to 70 c , v flt = 4.0v to 4.42v - 1 1 % automatic re - charge threshold voltage v rech 70 140 190 mv
TC7710AWBG 2014- 04- 11 49 dc characteristics (4) thermal monitor (factory programmable option) table 13 - 4 dc characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit high temperature trip point (programmable 509mv to 726mv, 4steps) v hot v therm falling , v hot = 0.726v, t a = 0 to 70 c 675 726 776 mv low temperature trip point (programmable 1.399v to 1.654v, 4steps) v cold v therm rising , v cold = 1.491v, t a = 0 to 70 c 1.437 1.491 1.543 v current source for ntc thermistor i ntc 10k ? ntc, t a = 0 to 70 c 180 200 220 a 25k ? ntc 72 80 88 a 50k ? ntc 36 40 44 a 100k ? ntc 18 20 22 a current source hysteresis for ntc thermistor i ntchys high temperature hysteresis, i ntc = 200 a 160 180 198 a low temperature hysteresis, i ntc = 200 a 198 220 242 a dc characteristics (5) logic inputs / outputs table 13 - 5 dc characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit input l level v il 600 mv input h level v ih 1.4 v sda / stat output l level v ol i sink = 3ma 300 mv stat leakage current i statlk 1 a en input bias current i enbias 1 a ilim_otg logic level voltage threshold v ilimotg input logic low - to - high state 0.9 v ilim_otg input bias current i ilimotgbs input logic low < 10 na input logic high, pull - up voltage 3.3v +5.5 +8 a
TC7710AWBG 2014- 04- 11 50 dc characteristics (6) usb otg power table 13 - 6 dc characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit output voltage (dcin pin) v otg v batt = 3.6v, programmable 4step s, 5.0v output setting 4.75 5.0 5.25 v uvlo battery voltage v batuvlo otg operation (refer to register 04h), 2.75v setting 2.63 2.75 2.87 v uvlo hysteresis v batuvlohy otg operation 110 170 230 mv otg battery current range i otg vbatt = 3.6v , current from battery, programmable 4steps, cci4- 0=500m a, note 4 400 500 600 ma cci4- 0=1000ma 800 1000 1200 cci4- 0=1500ma , t a = - 20 to 85 c 1200 1500 1800 cci4- 0=1800ma , t a = - 20 to 85 c 1440 1800 2160 dc characteristics (7) automatic power source detection (dp / dm) note 5 table 13 - 7 dc characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit data line leakage voltage v dat_lkg 0 3.6 v data detection voltage v dat_ref 0.25 0.33 0.40 v d+ source voltage v dp_src 0.50 0.60 0.70 v d- source voltage v dm_src 0.50 0.60 0.70 v d+ pull - up voltage v dp_up 3.0 3.3 3.6 v logic threshold v lgc 0.8 1.2 2.0 v d+ sink current i dp_sink 25 100 175 a d- sink current i dm_sink 25 100 175 a current source for data connect ed detection i dp_src 7 10 13 a data line leakage resistance r dat_lkg 300 k ? d- pull - down resistance r dm_down 14.25 20.0 24.80 k ? d+ pull - up resistance r dp_up 900 1200 1575 ?
TC7710AWBG 2014- 04- 11 51 ac characteristics (1) oscillator table 13 - 8 ac characteristics (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit oscillator frequency 1, timer frequency f osc t a = 0 to 70 c 2.40 3.0 3.60 mhz start - up time t start 20 ms oscillator frequency 2 , start- up timer frequency f tm t a = 0 to 70 c 85 khz pre - charge time out t pctofc safety timer 29 36 43 min charge completion time out t ctofc safety timer 204 240 276 min charge watchdog timer t cwd 33.6 42 50.4 sec otg power watchdog timer t otgwd 33.6 42 50.4 sec standby watchdog timer t stbywd no charging, no otg power 21 42 63 sec unconnected battery timer t batmis 65 86 105 ms device glitch filter t glitch enabled 130 168 210 ms ac characteristics (2) power source detection table 13 - 9 ac characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit data connected detection debounce t dcd_dbnc note 3, 5 10 ms data connected detection time out t dcd_timeout note 3, 5 300 ms dp source on time t vdpsrc_on note 3, 5 40 ms dm source on time t vdmsrc_on note 3, 5 40 ms
TC7710AWBG 2014- 04- 11 52 ac characteristics (3) i 2 c interface @ 400khz table 13 - 10 ac characteristics (continued) (unless otherwise specified, v dcin = 5.0v, v flt = 4.2v, v batt = 3.7v, ta = - 30 to 85 c, all voltages are relative to gnd.) characteristics symbol test condition min typ. max unit scl clock frequency f scl 0 400 khz scl clock low period t low 1.3 s scl clock high period t high 0.6 s bus free time (stop condition to start condition) t buf note 6 1.3 s start condition setup time t su:sta 0.6 s start condition hold time t hd:sta 0.6 s stop condition setup time t su:sto 0.6 s scl / sda rising time t r note 6 20+0.1cb 300 ns scl / sda falling time t f note 6 20+0.1cb 300 ns data in setup time t su:dat 100 ns data in hold time t hd:dat 0 0.9 s noise filter ti noise suppression 80 ns figure 13 - 1 i 2 c interface note 1 : input current limit i lim is prior to i prechg ,i fchg . note 2 : ic is not used as a battery protection. note 3 : design and characteristics are guaranteed. not 100% test. note 4 : o tg power path is shut off after 168ms (glitch filter period) since the selected otg current limit is reached. to re - start otg power path, set otg mode invalid, and then set it valid. note 5 : refer to battery charging specificati on rev1.2. note 6 : guaranteed by design. scl t low t high s t buf sda t su : sta t hd : sta t su : dat t hd : dat sr p t su : stp f scl
TC7710AWBG 2014- 04- 11 53 14. application circuit figure 14 - 1 application circuit control logic regulator pwm control dcin sda scl ilim_otg stat en csin p gnd sw dm dp vmoni mid sw ovp uvlo ovp uvlo therm csout vbatt s gnd
TC7710AWBG 2014- 04- 11 54 15. outline drawing 15.1 package dimensions unit: mm s- wfbga25 -0303- 0.40 - 001 s- wfbga25 - 0303- 0.40 - 002 tc7710 a wbg(o*) tc7710a wbg(z*) w eight : 0.0 0 9 g ( typ. )
TC7710AWBG 2014- 04- 11 55 15.2 marking TC7710AWBG(o*) marking part no. lot no. pin mark #1 TC7710AWBG(o*) lot no . : x yy zz (1) (2) (3) (1) manufactured year code annual code expressed as the last digit of year example ye a r 2009 2010 2011 2012 2013 code 9 0 1 2 3 (2) manufactured week code weekly code as the first thursday of january being determined the first week and accordingly reaches 52 nd or 53th week in a year. (3) our control number TC7710AWBG(z*) marking part no. lot no. pin mark #1 tc7710 a wbg(z*) lot no. : yy ww # (1) (2) (3) (1) manufactured year code annual code expressed as the last digit of year example ye a r 2009 2010 2011 2012 2013 code 09 10 11 12 13 (2) manufactured week code weekly code as the first week of january being determined 01 and accordingly reaches 52 nd or 53th week in a year. (3) our control number
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